Nowadays, a communication or Internet technology system is generally made up of a backplane and multiple single boards, with the backplane connected to the single boards through connectors, to facilitate management and maintenance. The signal pin of a connector on a backplane or single board is called “terminal”. The connector pins on a backplane are vertical to the single backplane, but the single boards have right-angled connectors, which facilitate vertical insertion into the backplane slots. The terminal of each slot on the backplane is fixed. The single boards are inserted into the corresponding backplane slots vertically according to their respective functions and pin assignment. The signals between the boards are connected through the printed wires on the backplane.
Depending on the importance, single boards are categorized into core boards and peripheral boards. A core board is a key component of the system. The core board in a robust system must be backed up for security. The general backup method is: two core boards with the same functions and interfaces are applied to a system. When the system works, the peripheral boards send circuit signals to the two core boards concurrently, receive signals from the two core boards concurrently, and choose to process the signals of a specific core board according to the factors such as signal quality. This function of peripheral boards is called “dual-transmit single-receive” function.
The signal connection between a core board and a peripheral board is generally implemented through backplane wiring. As shown in FIG. 1, a typical system capable of backing up core boards in the related art includes a number of peripheral boards 11 and two identical core boards 12. To implement such a system, the following factors need to be considered.
(1) The pin assignment and the connectors from the active core board to the backplane are the same as those from the standby core board to the backplane.
(2) The slots of the peripheral boards on the backplane may come in many types, depending on the functions; but all types of slots have the same pin layout and pin assignment, and the same connectors.
(3) The pin assignment of the slots of the corresponding peripheral boards on the backplane must cover the signals that come from the two core boards.
(4) The peripheral boards must have the “dual-transmit single-receive” function on the backplane.
As shown in FIG. 2, the layout of a peripheral board and a backplane in the related art includes a backplane 21, and a peripheral board 22. In FIG. 2, a terminal set 25 is a set of terminals connected to the active core board on the peripheral board 22, and corresponds to the terminal set 25′ on the backplane 21. A terminal set 26 is a set of terminals connected to the standby core board on the peripheral board 22, and corresponds to the terminal set 26′ on the backplane 21. A dual-transmit single-receive unit circuit 23 performs dual-transmit operations for the signals from the function processing unit circuit 24, and selects the signals from the terminal set 25 or 26 and sends the selected signals to the function processing unit circuit 24 for processing. In the practical application, the dotted line box in FIG. 2 may be realized through a chip, but the chip must include a dual-transmit single-receive unit circuit 23 and a function processing unit circuit 24.
However, in certain application environments, some peripheral boards in the system only need to process signals of one core board. That is, some peripheral boards only need to be connected to one of the core boards. A waste of resources arises if a board with a dual-transmit single-receive unit circuit shown in FIG. 2 is further applied. For cost efficiency, the dual-transmit single-receive unit circuit on the peripheral board may be removed, and only the function processing unit circuit needs to be reserved. If the technology is implemented on a single chip, the dual-transmit single-receive processing unit in the chip can be removed to slash the cost of the board.
However, the terminals corresponding to the peripheral board slots on the backplane include both the terminal set 25′ connected to the active core board and the terminal set 26′ connected to the standby core board. Moreover, the physical arrangement and the pin assignment of the terminals are fixed. As shown in FIG. 2, if a peripheral board 22 is connected to each core board through n signal lines, the function processing unit circuit 24 is connected to the dual-transmit single-receive unit circuit 23 also through n signal lines. If the function processing unit circuit 24 is reserved, only n signal lines can be led out. About how the peripheral board is connected to n terminals of the fixedly arranged terminal set 25′ or 26′ on the backplane, the related arts provide the following two methods.
FIG. 3 illustrates the structure of a peripheral board and the corresponding backplane in one method of the related art. The peripheral board 32 includes two function processing unit circuits 33 and 34. The function processing unit circuit 33 processes the signals of the terminal set 35, and the function processing unit circuit 34 processes the signals of the terminal set 36.
During the research and practice of the related art, the inventor finds that: a function processing unit circuit is added on the peripheral board in the solution of the related art, so that the peripheral board can be connected to the fixedly arranged terminal set 35′ or terminal set 36′ on the backplane as required, however, a function processing unit circuit is generally more expensive than a dual-transmit single-receive unit circuit, so this solution is costly.
FIG. 4A illustrates the structure of a backplane 41 and a peripheral board 42 designed solely processing the signals of the terminal set 44′ on the backplane 41 in another method of the related art. FIG. 4B illustrates the structure of a backplane 41 and a peripheral board 42 designed solely for processing the signals of the terminal set 45′ on the backplane 41 in another method of the related art. Two boards are designed separately. The peripheral board 42 contains a function processing unit circuit 43 and a terminal set 44. The terminal set 44 is connected to the terminal set 44′ on the backplane 41. The function processing unit circuit 43 is designed solely for processing the signals of the terminal set 44′ on the backplane. The peripheral board 42′ includes a function processing unit circuit 43′ and a terminal set 45. The terminal set 45 is connected to the terminal set 45′ on the backplane 41, and the function processing unit circuit 43′ is designed solely for processing the signals of the terminal set 45′.
During the research and practice of the related art, the inventor finds that: this solution can reduce the cost of the board, but two different boards need to be made, which brings much more cost of development, production and maintenance, on the whole, the solution is still costly.
In a word, the technical solution of the related arts is unable to provide cost efficiency.